|
APM86491
|
Inquire
|
19x19 WB-PBGA
|
800 MHz - 1 GHz
|
16b/32b
|
2 GbE: 2 RGMII
|
2
|
N/A
|
2x1
|
3.65 W @ 1 GHz
|
2 (USB 3.0)
|
|
Black Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
Two PCI Express® Gen 1/2 (x1) ports
USB: One USB 3.0 Host with integrated PHY, One USB 3.0 Host/Device with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG/Trace
|
|
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_AN_PowerGuide.pdf
APM86x91_Cascade_GSG.pdf
APM86x91_AN_LowPwrOp_2011_0030.pdf
|
PPC465_UM4110.pdf
|
|
PPC465_UM4110 2.pdf
|
APM86x91_Cascade_GSG (1).pdf
|
APM86x91_Cascade_UM_software.pdf
|
APM86x91_Cascade_UM.pdf
|
|
|
|
APM86791
|
Inquire
|
19x19 WB-PBGA
|
800 MHz - 1 GHz
|
16b/32b
|
4 GbE: 2 RGMII, 2 SGMII
|
1
|
2
|
2x1
|
3.65 W @ 1 GHz
|
2
|
|
Black Mamba.png
|
|
|
Datasheets
|
|
|
|
1
|
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports (2 SGMII, 2 RGMII) with Classification and TCP/IP off-load
Two PCI Express® Gen 1/2 (x1) ports
USB: One USB 2.0 Host with integrated PHY, One USB 2.0 Host/Device with integrated PHY
One SATA 2.0 port
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
|
Product Brief
|
APM86x91_Cascade_GSG.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_AN_PowerGuide.pdf
APM86x91_AN_LowPwrOp_2011_0030.pdf
APM86791_AN_HDVideo_2013_0001.pdf
|
PPC465_UM4110.pdf
|
|
PPC465_UM4110 2.pdf
|
APM86x91_Cascade_GSG (1).pdf
|
APM86x91_Cascade_UM_software.pdf
|
APM86x91_Cascade_UM.pdf
|
|
|
|
APM86391
|
Inquire
|
27x27 FC-PBGA
|
600 MHz - 1.0 GHz
|
32b
|
2 GbE: 2 RGMII
|
1
|
N/A
|
3x1
|
Dual Core 5 W @ 1 GHz
|
3
|
|
Black Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (36-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : Three Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
One SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
|
APM86x90_AN_HWMG.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
|
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
PPC465_UM4110.pdf
|
|
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
|
|
|
|
APM86391B_V0p1.zip
APM8639x_RevA_bsdl.zip
|
|
|
APM86392
|
Inquire
|
27x27 FC-PBGA
|
600 MHz - 1.0 GHz
|
32b
|
2 GbE: 2 RGMII
|
1
|
N/A
|
3x1
|
Dual Core 5 W @ 1 GHz
|
3
|
|
Black Mamba.png
|
|
|
APM86392.pdf
|
|
|
|
|
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (36-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : Three Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
One SATA 2.0 ports
Other Interfaces: NAND Flash Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
Product Brief
|
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
APM86x90_AN_HWMG.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
|
PPC465_UM4110.pdf
|
|
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
|
|
|
|
APM86391B_V0p1.zip
APM8639x_RevA_bsdl.zip
|
|
|
APM86190
|
Inquire
|
27x27 FC-PBGA
|
800 MHz - 1.2 GHz
|
64b / 32b
|
2 GbE: 2 RGMII
|
2
|
N/A
|
2x1 & 1x4
|
Dual Core 7.06 W @ 1 GHz
|
3
|
|
Green Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
Product Brief
|
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86x90_AN_DDR3.pdf
APM86x90_AN_InterfaceGuide.pdf
APM86x90_AN_SLIMproPwrMgt.pdf
APM86x90_AN_PowerGuide.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
APM86x90_swrn_sgeti_v1.20_2011_0006.pdf
Serengeti_Software_RN_2011_0006_v1_03.pdf
Serengeti_Software_RN_2011_0006_v1_06.pdf
|
PPC465_UM4110.pdf
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
|
Errata
|
User Guide
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
|
|
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.11.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.08.pdf
|
|
APM86190_V0p1.zip
aspen_ramdisk_2.02.03.tgz.zip
aspen_ramdisk_1.03.04.tgz.zip
aspen_ramdisk_1.04.22.tgz.zip
aspen_ramdisk_1.05.04.tgz.zip
aspen_ramdisk_2.01.09.tgz.zip
aspen_1.03.04.zip
aspen_1.04.22.tgz.zip
aspen_1.05.04.tgz.zip
aspen_2.01.09.tgz.zip
aspen_2.02.03.tgz.zip
mamba-freebsd-r2.1.tar.bz.zip
mamba-netbsd-r2.0.tar.bz.zip
openwrt-serengeti-1.00.03.tgz.zip
serengeti_amp_1.15.03.tgz.zip
serengeti_amp_1.18.06.tgz.zip
serengeti_amp_1.20.09.tgz.zip
serengeti_amp_1.21.04.tgz.zip
serengeti_amp_1.25.01.tgz.zip
serengeti_amp_1.26.04.tgz.zip
Serengeti_RCD_REV1.2.tgz.zip
serengeti_tools_1.20.09_patch.01.tgz.zip
serengeti_up_1.15.03.tgz.zip
serengeti_up_1.18.06.tgz.zip
serengeti_up_1.20.09.tgz.zip
serengeti_up_1.21.04.tgz.zip
serengeti_up_1.25.01.tgz.zip
serengeti_up_1.26.04.tgz.zip
Source_lanai-1.04-02.tgz.zip
|
|
|
APM86290
|
Inquire
|
27x27 FC-PBGA
|
800 MHz - 1.2 GHz
|
64b / 32b
|
2 GbE: 2 RGMII
|
2
|
N/A
|
2x1 & 1x4
|
Dual Core 7.06 W @ 1 GHz
|
3
|
|
Green Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Two GE ports (RGMII) with Classification and TCP/IP off-load
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
Product Brief
|
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
Serengeti_Software_RN_2011_0006_v1_03.pdf
Serengeti_Software_RN_2011_0006_v1_06.pdf
APM86x90_AN_DDR3.pdf
APM86x90_AN_InterfaceGuide.pdf
APM86x90_AN_SLIMproPwrMgt.pdf
APM86xxx_AN_Crypto_2011_0024.pdf
APM86x90_AN_PowerGuide.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86x90_APM8639x_DDR_pkg_delays.pdf
|
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.08.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.11.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
APM86x90_Serengeti_Software_RN_2011_0006_v1.12.pdf
|
Errata
|
Aspen_BSP_UM_2.02.03.pdf
PPC465_UM4110 2.pdf
|
|
|
|
|
|
|
APM86691
|
Inquire
|
27x27 FC-PBGA
|
800 MHz - 1.2 GHz
|
64b / 32b
|
4 GbE: 2 RGMII, up to 4 SGMII
|
2
|
2
|
2x1 & 1x4
|
Dual Core 7.06 W @ 1 GHz
|
3
|
|
Black Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Single-Core Power™465 processor with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports with Classification and TCP/IP off-load, up to 2 SGMII + 2RGMII or up to 4 RGMII
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
Product Brief
|
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
|
PPC465_UM4110.pdf
|
|
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
Aspen_BSP_UM_2.02.03.pdf
|
|
|
|
|
|
|
APM86692
|
Inquire
|
27x27 FC-PBGA
|
800 MHz - 1.2 GHz
|
64b / 32b
|
4 GbE: 2 RGMII, up to 4 SGMII
|
2
|
2
|
2x1 & 1x4
|
Dual Core 7.06 W @ 1 GHz
|
3
|
|
Black Mamba.png
|
|
|
Datasheet
|
|
|
|
|
Dual-Core Power™465 processor each with a Floating Point Unit (FPU)
32 KB L1 Instruction cache and 32 KB L1 Data cache
256 KB L2 cache per processor
Hardware cache coherency
DDR3 memory controller with optional ECC (72-bit) Offload Features
Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and public-key protocols (PKA)
True Random Number Generator (TRNG)
Four GE ports with Classification and TCP/IP off-load, up to 2 SGMII + 2RGMII or up to 4 RGMII
PCI Express® : One Gen 1/2 (x4/x1) port , Two Gen 1/2 (x1) ports
USB: Two USB 2.0 Hosts with integrated PHYs, One USB 2.0 OTG with integrated PHY
Two SATA 2.0 ports
Other Interfaces: NAND Flash Controller, LCD Controller, Two I2C, Four UARTS, GPIO, Two SPI, Two SDIO 3.0
JTAG / Trace
|
Product Brief
|
APM8669x_APM86x90_APM8639x_AN_PwrMgmt_2009_0006.pdf
PPC440H6_464_to_PPC465_SoftwareMigration_AN4114.pdf
APM86xxx_Aspen_Serengeti2_SW_RN_v1.4_2012_0040.pdf
APM86xxx_swrn_sgeti_aspen_v1.0_2012_0040.pdf
|
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
PPC465_UM4110.pdf
|
|
APM8669x_APM86x90E_APM8639xE_UM2011.pdf
Aspen_BSP_UM_2.02.03.pdf
|
|
|
|
|
|
|
PPC405EX
|
Inquire
|
27x27 WB-PBGA
|
400 MHz - 600 MHz
|
DDR1/2 32b
|
2 GbE
|
0
|
|
2x1 &
|
1.7 W @400Mhz
|
1
|
|
|
|
|
PPC405EX_DS2030.pdf
|
|
|
|
|
Single-Core Power™405 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : Two Gen 1/2 x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
|
PPC405EX_PB2051_EVK.pdf
PPC405EX_PB2028.pdf
|
405EX_405EXr_WhitePaper.pdf
Checklist_PowerPC_Kilauea_02 Rigel_Calypso QA Testing.pdf
GAN2002_PPC_MarkingDrawings.pdf
OpenWrtReleaseNotes-kilauea-1.00-01.pdf
rel_notes_PPC_Linux_Kilauea_optimized_02.pdf
pismo-release-notes-1.pdf
405EX_405EXr_AN2131_DDR.pdf
460EX_460EXr_460GT_AN2132_DDR.pdf
MACSec_AN2134_Protocol_Manual.pdf
PPC400_AN4002_Security_CoProc_Performance.pdf
PPC405_460_AN2133_DTLS.pdf
PPC405EX_405EXr_AN4000_Security_CoProc_Perf_WP.pdf
PPC405EX_405EXr_AN4001_Performance_Benchmarking.pdf
PPC405EX_405EXr_AN4037_PCIeBoardConsiderations.pdf
PPC405EX_405EXr_AN4038_MSI.pdf
PPC405EX_405EXr_AN4099_ClockBoot.pdf
PPC405EX_AN2135_InterfaceGuide.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
PPC4xx_UM2025_SLAD.pdf
|
405EX_ERR2023.pdf
|
PPC4xx_UM2025_SLAD.pdf
PPC405_UM2022.pdf
PPC405EX-EXr_UM2023.pdf
PPC440H6_464_UM4034.pdf
|
|
|
|
Binaries_openwrt-kilauea-1.00-01.tgz.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_02.zip
IBMDFT_1149_1_1998_V5(1).zip
PPC405EX_ORCAD_SYMBOL.zip
Linux2_6_25_7_Source_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Source_PPC_Kilauea_optimized_02.zip
Source_openwrt-kilauea-1.00-01.tgz.zip
|
405EX_BSDL_no_security.zip
405EX_BSDL_with_security.zip
ppc405ex_rev1_4.zip
|
|
PPC405EXr
|
Inquire
|
27x27 WB-PBGA
|
333 MHz - 533 MHz
|
DDR1/2 32b
|
1 GbE
|
0
|
|
1x1
|
1.7 W @400Mhz
|
1
|
|
|
|
|
PPC405EXr_DS2064.pdf
|
|
|
|
|
Single-Core Power™405 processor
DDR1/2 memory controller
Security subsystem (optional)
One GE ports
PCI Express® : Two Gen 1/2 x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
|
PPC405EXr_PB2047.pdf
|
405EX_405EXr_WhitePaper.pdf
GAN2002_PPC_MarkingDrawings.pdf
405EX_405EXr_AN2131_DDR.pdf
460EX_460EXr_460GT_AN2132_DDR.pdf
MACSec_AN2134_Protocol_Manual.pdf
PPC400_AN4002_Security_CoProc_Performance.pdf
PPC405_460_AN2133_DTLS.pdf
PPC405EX_405EXr_AN4000_Security_CoProc_Perf_WP.pdf
PPC405EX_405EXr_AN4001_Performance_Benchmarking.pdf
PPC405EX_405EXr_AN4037_PCIeBoardConsiderations.pdf
PPC405EX_405EXr_AN4038_MSI.pdf
PPC405EX_405EXr_AN4099_ClockBoot.pdf
PPC405EXr_AN2136_InterfaceGuide.pdf
PPC405EXr_PB2052_EVK.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
|
405EX_ERR2023.pdf
|
PPC4xx_UM2025_SLAD.pdf
PPC405_UM2022.pdf
PPC405EX-EXr_UM2023.pdf
PPC440H6_464_UM4034.pdf
|
|
|
|
Binaries_openwrt-kilauea-1.00-01.tgz.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Binaries_PPC_Kilauea_optimized_02.zip
IBMDFT_1149_1_1998_V5(1).zip
Linux2_6_25_7_Source_PPC_Kilauea_optimized_01.zip
Linux2_6_25_7_Source_PPC_Kilauea_optimized_02.zip
Source_openwrt-kilauea-1.00-01.tgz.zip
|
405EXr_BSDL_no_security.zip
405EXr_BSDL_with_security.zip
ppc405exr_rev1_2.zip
|
|
PPC460EXR
|
Inquire
|
27x27 WB-PBGA
|
600 MHz - 1 GHz
|
DDR1/2 32b
|
2 GbE
|
1
|
|
1x1 & 1x4
|
3.9 W @1 Ghz
|
1
|
|
|
|
|
PPC460EXr_DS4032.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port
USB: One USB 2.0 Host/Device OTG and Host Interface
JTAG / Trace
SATA controller
|
PPC460EXr_PB4047.pdf
|
GAN2002_PPC_MarkingDrawings.pdf
460EX_460EXr_460GT_AN2132_DDR.pdf
MACSec_AN2134_Protocol_Manual.pdf
PPC405_460_AN2133_DTLS.pdf
PPC460EX_460EXr_460GT_AN4042_SoftwareMigration.pdf
PPC460EX_460EXr_460GT_AN4083_ClockBoot.pdf
PPC460EX_460GT_AN4039_ClkPwrMgmt.pdf
PPC460EXr_AN4043_InterfaceGuide.pdf
PPC460EXr_AN4056_signal_list.pdf
PPC460GT_460EX_AN4028_Performance_Benchmarking.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
|
PPC460EX_460EXr_ERR4003.pdf
|
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
PPC440H6_464_UM4034.pdf
PPC460EX_460EXr_460GT_UM2024.pdf
PPC460EX_460EXr_UM4053_RAID_Addendum.pdf
|
|
|
|
PPC460EXR_ORCAD_SYMBOL.zip
IBMDFT_1149_1_1998_V5(1).zip
|
ppc460exr.zip
PPC460EXr_BSDL4084.zip
|
|
PPC460EX
|
Inquire
|
27x27 WB-PBGA
|
600 MHz - 1 GHz
|
DDR1/2 32b
|
2 GbE
|
1
|
|
1x1 & 1x4 & 32b PCI (optional)
|
3.9 W - 5.0 W @1 Ghz
|
1
|
|
|
|
|
PPC460EX-N_DS4120.pdf
PPC460EX-T_DS2063.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port, One 32b PCI port (optional)
USB: One USB 2.0 Host/Device OTG and Host Interface
JTAG / Trace
SATA controller
|
Canyonlands_PB4108.pdf
PPC460EX_PB2027.pdf
|
des0225_12_sch_13.pdf
GAN2002_PPC_MarkingDrawings.pdf
Pismo-Release-Notes-2.00.02.pdf
rel_notes_Canyonlands_optimized_2.6.30_1.13-01.pdf
460EX_460EXr_460GT_AN2132_DDR.pdf
MACSec_AN2134_Protocol_Manual.pdf
PPC405_460_AN2133_DTLS.pdf
PPC460EX_460EXr_460GT_AN4042_SoftwareMigration.pdf
PPC460EX_460EXr_460GT_AN4083_ClockBoot.pdf
PPC460EX_460GT_AN4039_ClkPwrMgmt.pdf
PPC460EX_AN2125_signal_list.pdf
PPC460EX_AN2139_InterfaceGuide.pdf
PPC460EX_AN4046_8541Migration.pdf
PPC460GT_460EX_AN4028_Performance_Benchmarking.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
|
PPC460EX_460EXr_ERR4003.pdf
|
ep460c_um_amcc.pdf
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
PPC440H6_464_UM4034.pdf
PPC460EX_460EXr_460GT_UM2024.pdf
PPC460EX_460EXr_UM4053_RAID_Addendum.pdf
|
|
|
|
Binaries_CanyonlandsOptimized_2.6.30_1.07-01.tgz.zip
Binaries_CanyonlandsOptimized_2.6.30_1.13-01.tgz.zip
Binaries_openwrt-canyonlands-1.11-03.tgz.zip
Binaries_pismo-2.00.02.tgz.zip
CANYONLAND_PPC460EX.zip
DES0225_12_SCH_13.zip
Docs_pismo-1.04-03.tgz.zip
IBMDFT_1149_1_1998_V5(1).zip
Binaries_pismo-1.04-03.tgz.zip
Binaries_pismo-1.07-03.tgz.zip
Rootfs_pismo-2.00.02.tgz.zip
Source_openwrt-canyonlands-1.11-03.tgz.zip
Source_pismo-1.04-03.tgz.zip
Source_pismo-1.07-03.tgz.zip
Source_pismo-2.00.02.tgz.zip
Sources_CanyonlandsOptimized_2.6.30_1.07-01.tgz.zip
Sources_CanyonlandsOptimized_2.6.30_1.13-01.tgz.zip
|
PPC460EX_BSDL4020.zip
|
|
PPC460GT
|
Inquire
|
27x27 WB-PBGA
|
600 MHz - 1 GHz
|
DDR1/2 32b
|
4 GbE
|
1
|
|
1x1 & 1x4 & 32b PCI (optional)
|
3.9 W - 5.0 W @1 Ghz
|
0
|
|
|
|
|
PPC460GT-N_DS4121.pdf
PPC460GT-T_DS2065.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Four GE ports
PCI Express® : One Gen 1/2 x1 port, One Gen 1/2 x4 port, One 32b PCI port (optional)
JTAG / Trace
SRIO port
|
PPC460GT_PB2049.pdf
|
GAN2002_PPC_MarkingDrawings.pdf
460EX_460EXr_460GT_AN2132_DDR.pdf
MACSec_AN2134_Protocol_Manual.pdf
PPC400_AN4002_Security_CoProc_Performance.pdf
PPC405_460_AN2133_DTLS.pdf
PPC460EX_460EXr_460GT_AN4042_SoftwareMigration.pdf
PPC460EX_460EXr_460GT_AN4083_ClockBoot.pdf
PPC460EX_460GT_AN4039_ClkPwrMgmt.pdf
PPC460GT_460EX_AN4028_Performance_Benchmarking.pdf
PPC460GT_AN2126_signal_list.pdf
PPC460GT_AN4030_InterfaceGuide.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
|
PPC460GT_ERR4004.pdf
|
PPC4xx_UM2025_SLAD.pdf
PPC440H6_464_UM4034 2.pdf
PPC440H6_464_UM4034.pdf
PPC460EX_460EXr_460GT_UM2024.pdf
PPC460EX_460EXr_UM4053_RAID_Addendum.pdf
|
|
|
|
IBMDFT_1149_1_1998_V5(1).zip
|
ppc460gt.zip
PPC460GT_BSDL4022.zip
|
|
APM80186
|
Inquire
|
|
|
|
|
|
|
|
|
|
|
|
|
|
APM8018x_PB4092.pdf
APM80186_DS4105.pdf
|
|
|
|
|
Single-Core Power™405 processor
DDR2 memory controller
Security subsystem
Two GE ports
PCI Express® : One x1 port
USB: One USB 2.0 port configurable as either Host or Device
One SATA port
JTAG / Trace
|
Klondike_PB4118.pdf
|
Lanai_Functional_Test_Report_2 01 02 Linux Test Cases.pdf
Lanai_Functional_Test_Report_2 01 02 Summary.pdf
Lanai_Functional_Test_Report_2 01 02 Test Configuration.pdf
Lanai_Functional_Test_Report_2 01 02 Test Matrix.pdf
Lanai_Functional_Test_Report_2 01 02 U-Boot Test Cases.pdf
APM8018x_DDR2_AN_2011_0036.pdf
APM8018x_AN4119_I2C-SPIBootMode.pdf
|
|
APM8018x_ERR4115.pdf
|
APM8018x_KlondikeLassen_GSG_2010_0018.pdf
APM8018x_KlondikeLassen_UM_2010_0019.pdf
APM8018x_KlondikeLassenBSP_UM_2010_0024.pdf
PPC405_UM2022.pdf
APM8018x_UM4111.pdf
|
|
BuildingOpenWrtwithCodeSourcery.pdf
|
|
APM80186_1_0.zip
Binaries_lanai-1.04-02.tgz.zip
md5sum_klondike_rcd.zip
Klondike_2.01.02.tgz.zip
Klondike_2.03.02.tgz.zip
Klondike_2.04.02.tgz.zip
openwrt-klondike-2.00.02.tgz.zip
|
APM8018x_BSDL4132.zip
APM8018x_IBIS.zip
APM8018x_KlondikeLassenBSP_RN_2011_0009.pdf
klondike_sch_rev09_05oct10_1730.pdf
|
|
APM80187
|
Inquire
|
|
|
|
|
|
|
|
|
|
|
|
|
|
APM8018x_PB4092.pdf
APM80187_DS4106.pdf
|
|
|
|
|
Single-Core Power™405 processor
DDR2 memory controller
Security subsystem
Two GE ports
PCI Express® : Two x1 ports
USB: One USB 2.0 port configurable as either Host or Device
JTAG / Trace
|
|
Lanai_Functional_Test_Report_2 01 02 Linux Test Cases.pdf
Lanai_Functional_Test_Report_2 01 02 Summary.pdf
Lanai_Functional_Test_Report_2 01 02 Test Configuration.pdf
Lanai_Functional_Test_Report_2 01 02 Test Matrix.pdf
Lanai_Functional_Test_Report_2 01 02 U-Boot Test Cases.pdf
Lassen_PB4127.pdf
APM8018x_DDR2_AN_2011_0036.pdf
APM8018x_AN4119_I2C-SPIBootMode.pdf
|
|
APM8018x_ERR4115.pdf
|
APM8018x_KlondikeLassen_GSG_2010_0018.pdf
APM8018x_KlondikeLassen_UM_2010_0019.pdf
APM8018x_KlondikeLassenBSP_UM_2010_0024.pdf
PPC405_UM2022.pdf
APM8018x_UM4111.pdf
|
|
BuildingOpenWrtwithCodeSourcery.pdf
|
|
Binaries_lanai-1.04-02.tgz.zip
md5sum_klondike_rcd.zip
Klondike_2.01.02.tgz.zip
Klondike_2.03.02.tgz.zip
Klondike_2.04.02.tgz.zip
openwrt-klondike-2.00.02.tgz.zip
|
APM8018x_BSDL4132.zip
APM8018x_IBIS.zip
APM8018x_KlondikeLassenBSP_RN_2011_0009.pdf
|
|
PPC440EPX
|
Inquire
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PPC440EPx_DS2023.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1/2 memory controller
Security subsystem (optional)
Two GE ports
One PCI V2.2 port
USB: One USB 2.0 Device or Host port and One USB 2.0 Device port
JTAG / Trace
|
PPC440EPx_PB2041_EVK.pdf
PPC440EPx_PB2023.pdf
|
GAN2002_PPC_MarkingDrawings.pdf
440EPx_440GRx_AN2104_DDR.pdf
PPC440EPx_440GRx_AN2128.pdf
PPC440EPx_440GRx_AN4029_InterfaceGuide.pdf
PPC4xx_AN4061_JTAGReset.pdf
|
|
PPC440EPx_ERR2018.pdf
|
PPC440.UM2013 2.pdf
PPC440_UM2013.pdf
PPC440EPx_440GRx_UM2018.pdf
|
|
|
|
PPC440EPx_BSDL_readme.zip
|
440EPx_IBIS.zip
|
|
PPC440GX
|
Inquire
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PPC440GX_DS2001.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1 memory controller
Two GE ports
One PCI-X V1.0a port
JTAG / Trace
|
PPC440GX_PB2000.pdf
|
PPC440GX_AN2007_DDR_Tun.pdf
PPC440GX_AN2009_ECC_OvrVw.pdf
PPC440GX_AN2017_TCP_IP_AH.pdf
GAN2002_PPC_MarkingDrawings.pdf
PPC440EP_AN2003_SWM.pdf
PPC440GX_AN2001_MSC.pdf
PPC440GX_AN2006_MHW.pdf
PPC440GX_AN2008_DDR_Mem_Cntrl.pdf
PPC440GX_AN2010_PCIX_Term.pdf
PPC440GX_FAQ2004_TCPIC.pdf
PPC4xx_AN4051_DDR_Calibration.pdf
PPC4xx_AN4061_JTAGReset.pdf
PPC4xx_AN4122_L2Cache_ParityErrorRecovery.pdf
|
|
PPC440GX_ERR2008.pdf
|
PPC440.UM2013 2.pdf
PPC440GX_PB2043_EVK.pdf
PPC440_UM2013.pdf
PPC440GX_UM2001.pdf
|
|
|
|
ppc440GX__3cc533c.zip
ppc440gx__3ff533c.zip
IBMDFT_1149_1_1998_V5(1).zip
|
ppc440gx_3cf533c.zip
ppc440gx_3cf533c.ibis.zip
PPC440GX_BOM2000_Level_4.pdf
|
|
PPC440EP
|
Inquire
|
|
333 MHz - 533 MHz
|
DDR1 32b
|
2 10/100E
|
0
|
|
PCI V2.2
|
<3 W @533Mhz
|
2
|
|
|
|
|
PPC440EP_DS2002.pdf
|
|
|
|
|
Single-Core Power™440 processor
DDR1 memory controller
Two 10/100E ports
One PCI
V2.2 port
USB 2.0: One Host with integrated PHY , One Device port
|
PPC440EP_PB2001.pdf
|
PPC440EP_440GR_AN4031_InterfaceGuide.pdf
PPC440EP_AN2003_SWM.pdf
PPC440EP_AN2055_P1toP2Diff.pdf
PPC4xx_AN4061_JTAGReset.pdf
|
|
PPC440EP_ERR2001.pdf
|
PPC440_UM2013.pdf
PPC440EP_UM2000.pdf
|
|
|
|
|
ppc440ep_3jcnnnc.zip
PPC440EP_IBIS2010.zip
|
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