Reducing solder voids is a pervasive challenge affecting the electronics industry. With higher thermal dissipation requirements placed upon the attachment of a device to a circuit board the number of voids within the solder joint becomes critical. There are various considerations that need to be taken into account, including 1) the design of the substrate 2) the surface condition of the part being attached 3) the type of solder selected 4) the reflow profile 5) pattern and volume of paste deposition, among others. Let’s dive further into some of these considerations:
Substrate design can have a large effect on the resulting level of solder voiding within the solder joint connection. Most land pads use thermal vias to dissipate heat while parts requiring even higher thermal dissipation capability utilize embedded heat slugs. These thermal dissipation structures can impact how the solder connection is formed during reflow, causing temperature differences in areas that have vias or slugs vs. areas that do not.
Solder paste selection and flux type can also impact the final overall solder void connection. In general, for bottom terminated components (BTC) a ‘no clean flux’ within the paste should be used. That said, many solder paste manufacturers have their own formulations to help with reducing the amount of solder voiding. Careful attention should be paid to selecting the right solder paste/flux formulation and to follow the supplier’s recommended solder profile. In addition, the Association Connecting Electronics Industries (IPC) has a standard IPC-7530A: Guidelines for Temperature Profiling for Mass Soldering Processes to assist with understanding the reflow process and setting up reflow profiles.
The solder paste application process can also play a role in how many solder voids are formed. In most cases stencil printing is performed. There are various methods to print the paste in terms of pattern to allow flux volatiles to escape. Balancing the volume of paste deposited on the I/Os vs. the ground paddles on the mating substrate, can also impact the amount of voiding.
MACOM application note S2083 is available to customers to assist in the recommended land pad design and stencil design for our products. In addition, for BTCs, IPC also has available document IPC-7093: Design and Assembly Process Implementation for Bottom Termination (BTC) Components to help customers with the overall construction and post assembly of BTC components onto a second level assembly.
For more information and supplemental reading:
1. M. Johnson, E. Eilenberg, P. Hogan, J. Aldrich, A. Reyes, “Comparison of Laminate Construction Methods on Fabrication, Junction Temperature and Second Level Assembly”, 2019 IPC Apex Expo, January 2019, San Diego, CA United States.
2. M. Johnson, “Techniques to Reduce Solder Voiding Under BTC Components”, 2018 IMAPs New England, May 2018, Boxborough, MA United States.